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<title>Software Guard Extensions</title>

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<span id="openzim-page-title" class="mw-page-title-main"><span class="mw-page-title-main">Software Guard Extensions</span></span>

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<div id="mw-content-text" class="mw-body-content mw-content-ltr" lang="en" dir="ltr"><div class="mw-content-ltr mw-parser-output" lang="en" dir="ltr"><p><b>Intel Software Guard Extensions</b> (<b>SGX</b>) is a set of <a href="Instruction_code" class="mw-redirect" title="Instruction code">instruction codes</a> implementing <a href="Trusted_execution_environment" title="Trusted execution environment">trusted execution environment</a> that are built into some <a href="Intel" title="Intel">Intel</a> <a href="Central_processing_unit" title="Central processing unit">central processing units</a> (CPUs). They allow <a href="User-level" class="mw-redirect" title="User-level">user-level</a> and <a href="Operating_system" title="Operating system">operating system</a> code to define protected private regions of memory, called <i>enclaves</i>.<sup id="cite_ref-Intel_2013_1-0" class="reference"><a href="#cite_note-Intel_2013-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Intel_2019_2-0" class="reference"><a href="#cite_note-Intel_2019-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> SGX is designed to be useful for implementing secure <a href="Remote_desktop_software" title="Remote desktop software">remote computation</a>, secure <a href="Web_browsing" class="mw-redirect" title="Web browsing">web browsing</a>, and <a href="Digital_rights_management" title="Digital rights management">digital rights management</a> (DRM).<sup id="cite_ref-3" class="reference"><a href="#cite_note-3"><span class="cite-bracket">[</span>3<span class="cite-bracket">]</span></a></sup> Other applications include concealment of <a href="Proprietary_software" title="Proprietary software">proprietary algorithms</a> and of <a href="Encryption_key" class="mw-redirect" title="Encryption key">encryption keys</a>.<sup id="cite_ref-sd_4-0" class="reference"><a href="#cite_note-sd-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup>

</p><p>SGX involves <a href="Encryption" title="Encryption">encryption</a> by the CPU of a portion of memory (the <i>enclave</i>). Data and code originating in the enclave are <a href="Decryption" class="mw-redirect" title="Decryption">decrypted</a> <a href="On_the_fly" title="On the fly">on the fly</a> <i>within</i> the CPU,<sup id="cite_ref-sd_4-1" class="reference"><a href="#cite_note-sd-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> protecting them from being examined or read by other code,<sup id="cite_ref-sd_4-2" class="reference"><a href="#cite_note-sd-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup> including code running at higher <a href="Privilege_level" class="mw-redirect" title="Privilege level">privilege levels</a> such as the <a href="Operating_system" title="Operating system">operating system</a> and any underlying <a href="Hypervisor" title="Hypervisor">hypervisors</a>.<sup id="cite_ref-Intel_2013_1-1" class="reference"><a href="#cite_note-Intel_2013-1"><span class="cite-bracket">[</span>1<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-sd_4-3" class="reference"><a href="#cite_note-sd-4"><span class="cite-bracket">[</span>4<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-Intel_2019_2-1" class="reference"><a href="#cite_note-Intel_2019-2"><span class="cite-bracket">[</span>2<span class="cite-bracket">]</span></a></sup> While this can mitigate many kinds of attacks, it does not protect against <a href="Side-channel_attack" title="Side-channel attack">side-channel attacks</a>.<sup id="cite_ref-5" class="reference"><a href="#cite_note-5"><span class="cite-bracket">[</span>5<span class="cite-bracket">]</span></a></sup>

</p><p>A pivot by Intel in 2021 resulted in the deprecation of SGX from the 11th and 12th generation <a href="Intel_Core" title="Intel Core">Intel Core</a> processors, but development continues on Intel Xeon for cloud and enterprise use.<sup id="cite_ref-bleep_6-0" class="reference"><a href="#cite_note-bleep-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-7" class="reference"><a href="#cite_note-7"><span class="cite-bracket">[</span>7<span class="cite-bracket">]</span></a></sup>

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<div class="mw-heading mw-heading2"><h2 id="Details">Details</h2></div>

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<p>SGX was first introduced in 2015 with the sixth generation <a href="Intel_Core" title="Intel Core">Intel Core</a> microprocessors based on the <a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a> <a href="Microarchitecture" title="Microarchitecture">microarchitecture</a>.

</p><p>Support for SGX in the CPU is indicated in <a href="CPUID" title="CPUID">CPUID</a> "Structured Extended feature Leaf", EBX bit 02,<sup id="cite_ref-8" class="reference"><a href="#cite_note-8"><span class="cite-bracket">[</span>8<span class="cite-bracket">]</span></a></sup> but its availability to applications requires <a href="BIOS" title="BIOS">BIOS</a>/<a href="Unified_Extensible_Firmware_Interface" class="mw-redirect" title="Unified Extensible Firmware Interface">UEFI</a> support and opt-in enabling which is not reflected in CPUID bits. This complicates the feature detection logic for applications.<sup id="cite_ref-9" class="reference"><a href="#cite_note-9"><span class="cite-bracket">[</span>9<span class="cite-bracket">]</span></a></sup>

</p><p>Emulation of SGX was added to an experimental version of the <a href="QEMU" title="QEMU">QEMU</a> system emulator in 2014.<sup id="cite_ref-10" class="reference"><a href="#cite_note-10"><span class="cite-bracket">[</span>10<span class="cite-bracket">]</span></a></sup> In 2015, researchers at the <a href="Georgia_Institute_of_Technology" class="mw-redirect" title="Georgia Institute of Technology">Georgia Institute of Technology</a> released an open-source simulator named "OpenSGX".<sup id="cite_ref-11" class="reference"><a href="#cite_note-11"><span class="cite-bracket">[</span>11<span class="cite-bracket">]</span></a></sup>

</p><p>One example of SGX used in security was a demo application from <a href="WolfSSL" title="WolfSSL">wolfSSL</a><sup id="cite_ref-12" class="reference"><a href="#cite_note-12"><span class="cite-bracket">[</span>12<span class="cite-bracket">]</span></a></sup> using it for cryptography algorithms.

</p><p>Intel <a href="Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a> (Gemini Lake) microarchitecture also contains support for Intel SGX.<sup id="cite_ref-13" class="reference"><a href="#cite_note-13"><span class="cite-bracket">[</span>13<span class="cite-bracket">]</span></a></sup>

</p><p>Both in the <a href="Rocket_Lake" title="Rocket Lake">11th</a> and <a href="Alder_Lake_(microprocessor)" class="mw-redirect" title="Alder Lake (microprocessor)">12th</a> generations of Intel Core processors, SGX is listed as "Deprecated" and thereby not supported on "client platform" processors.<sup id="cite_ref-bleep_6-1" class="reference"><a href="#cite_note-bleep-6"><span class="cite-bracket">[</span>6<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-14" class="reference"><a href="#cite_note-14"><span class="cite-bracket">[</span>14<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-15" class="reference"><a href="#cite_note-15"><span class="cite-bracket">[</span>15<span class="cite-bracket">]</span></a></sup> This removed support of playing <a href="Ultra_HD_Blu-ray" title="Ultra HD Blu-ray">Ultra HD Blu-ray</a> discs on officially licensed software, such as <a href="PowerDVD" title="PowerDVD">PowerDVD</a>.<sup id="cite_ref-16" class="reference"><a href="#cite_note-16"><span class="cite-bracket">[</span>16<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-17" class="reference"><a href="#cite_note-17"><span class="cite-bracket">[</span>17<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-18" class="reference"><a href="#cite_note-18"><span class="cite-bracket">[</span>18<span class="cite-bracket">]</span></a></sup>

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<div class="mw-heading mw-heading2"><h2 id="List_of_SGX_vulnerabilities">List of SGX vulnerabilities</h2></div>

<div class="mw-heading mw-heading3"><h3 id="Prime+Probe_attack">Prime+Probe attack</h3></div>

<p>On 27 March 2017 researchers at Austria's <a href="Graz_University_of_Technology" title="Graz University of Technology">Graz University of Technology</a> developed a proof-of-concept that can grab <a href="RSA_(cryptosystem)" class="mw-redirect" title="RSA (cryptosystem)">RSA</a> keys from SGX enclaves running on the same system within five minutes by using certain CPU instructions in lieu of a fine-grained timer to exploit <a href="Cache_memory" class="mw-redirect" title="Cache memory">cache</a> <a href="DRAM" class="mw-redirect" title="DRAM">DRAM</a> side-channels.<sup id="cite_ref-19" class="reference"><a href="#cite_note-19"><span class="cite-bracket">[</span>19<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-20" class="reference"><a href="#cite_note-20"><span class="cite-bracket">[</span>20<span class="cite-bracket">]</span></a></sup> One countermeasure for this type of attack was presented and published by Daniel Gruss et al. at the <a href="USENIX" title="USENIX">USENIX</a> Security Symposium in 2017.<sup id="cite_ref-21" class="reference"><a href="#cite_note-21"><span class="cite-bracket">[</span>21<span class="cite-bracket">]</span></a></sup> Among other published countermeasures, one countermeasure to this type of attack was published on September 28, 2017, a compiler-based tool, DR.SGX,<sup id="cite_ref-22" class="reference"><a href="#cite_note-22"><span class="cite-bracket">[</span>22<span class="cite-bracket">]</span></a></sup> that claims to have superior performance with the elimination of the implementation complexity of other proposed solutions.

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<div class="mw-heading mw-heading3"><h3 id="Spectre-like_attack">Spectre-like attack</h3></div>

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</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Spectre_(security_vulnerability)" title="Spectre (security vulnerability)">Spectre (security vulnerability)</a></div>

<p>The LSDS group at Imperial College London showed a proof of concept that the <a href="Spectre_(security_vulnerability)" title="Spectre (security vulnerability)">Spectre</a> speculative execution security vulnerability can be adapted to attack the secure enclave.<sup id="cite_ref-23" class="reference"><a href="#cite_note-23"><span class="cite-bracket">[</span>23<span class="cite-bracket">]</span></a></sup> The <a href="Foreshadow_(security_vulnerability)" class="mw-redirect" title="Foreshadow (security vulnerability)">Foreshadow</a> attack, disclosed in August 2018, combines speculative execution and buffer overflow to bypass the SGX.<sup id="cite_ref-24" class="reference"><a href="#cite_note-24"><span class="cite-bracket">[</span>24<span class="cite-bracket">]</span></a></sup> A security advisory and mitigation for this attack, also called an L1 Terminal Fault, was originally issued on August 14, 2018 and updated May 11, 2021.<sup id="cite_ref-25" class="reference"><a href="#cite_note-25"><span class="cite-bracket">[</span>25<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Enclave_attack">Enclave attack</h3></div>

<p>On 8 February 2019, researchers at Austria's <a href="Graz_University_of_Technology" title="Graz University of Technology">Graz University of Technology</a> published findings which showed that in some cases it is possible to run malicious code from within the enclave itself.<sup id="cite_ref-26" class="reference"><a href="#cite_note-26"><span class="cite-bracket">[</span>26<span class="cite-bracket">]</span></a></sup> The exploit involves scanning through process memory in order to reconstruct a payload, which can then run code on the system. The paper claims that due to the confidential and protected nature of the enclave, it is impossible for <a href="Antivirus_software" title="Antivirus software">antivirus software</a> to detect and remove malware residing within it. Intel issued a statement, stating that this attack was outside the threat model of SGX, that they cannot guarantee that code run by the user comes from trusted sources, and urged consumers to only run trusted code.<sup id="cite_ref-27" class="reference"><a href="#cite_note-27"><span class="cite-bracket">[</span>27<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="MicroScope_replay_attack">MicroScope replay attack</h3></div>

<p>There is a proliferation of <a href="Side-channel_attack" title="Side-channel attack">side-channel attacks</a> plaguing modern computer architectures. Many of these attacks measure slight, nondeterministic variations in the execution of code, so the attacker needs many measurements (possibly tens of thousands) to learn secrets. However, the MicroScope attack allows a malicious OS to replay code an arbitrary number of times regardless of the program's actual structure, enabling dozens of side-channel attacks.<sup id="cite_ref-28" class="reference"><a href="#cite_note-28"><span class="cite-bracket">[</span>28<span class="cite-bracket">]</span></a></sup> In July 2022, Intel submitted a Linux patch called AEX-Notify to allow the SGX enclave programmer to write a handler for these types of events.<sup id="cite_ref-29" class="reference"><a href="#cite_note-29"><span class="cite-bracket">[</span>29<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Plundervolt">Plundervolt</h3></div>

<p>Security researchers were able to inject timing specific faults into execution within the enclave, resulting in leakage of information. The attack can be executed remotely, but requires

access to the privileged control of the processor's voltage and frequency.<sup id="cite_ref-30" class="reference"><a href="#cite_note-30"><span class="cite-bracket">[</span>30<span class="cite-bracket">]</span></a></sup> A security advisory and mitigation for this attack was originally issued on August 14, 2018 and updated on March 20, 2020.<sup id="cite_ref-31" class="reference"><a href="#cite_note-31"><span class="cite-bracket">[</span>31<span class="cite-bracket">]</span></a></sup>

</p>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Load_value_injection" title="Load value injection">Load value injection</a></div>

<p>Load Value Injection<sup id="cite_ref-32" class="reference"><a href="#cite_note-32"><span class="cite-bracket">[</span>32<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-33" class="reference"><a href="#cite_note-33"><span class="cite-bracket">[</span>33<span class="cite-bracket">]</span></a></sup> injects data into a program aiming to replace the value loaded from memory which is then used for a short time before the mistake is spotted and rolled back, during which LVI controls data and control flow. A security advisory and mitigation for this attack was originally issued on March 10, 2020 and updated on May 11, 2021.<sup id="cite_ref-34" class="reference"><a href="#cite_note-34"><span class="cite-bracket">[</span>34<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="SGAxe">SGAxe</h3></div>

<p>SGAxe,<sup id="cite_ref-35" class="reference"><a href="#cite_note-35"><span class="cite-bracket">[</span>35<span class="cite-bracket">]</span></a></sup> an SGX vulnerability published in 2020, extends a <a href="Speculative_execution#Security_vulnerabilities" title="Speculative execution">speculative execution attack</a> on cache,<sup id="cite_ref-36" class="reference"><a href="#cite_note-36"><span class="cite-bracket">[</span>36<span class="cite-bracket">]</span></a></sup> leaking content of the enclave. This allows an attacker to access private CPU keys used for remote attestation.<sup id="cite_ref-37" class="reference"><a href="#cite_note-37"><span class="cite-bracket">[</span>37<span class="cite-bracket">]</span></a></sup> In other words, a threat actor can bypass Intel's countermeasures to breach SGX enclaves' confidentiality. The <a rel="nofollow" class="external text" href="https://www.hackreports.com/sgaxe-crosstalk-attacks-intel-sgx-vulnerability/">SGAxe attack</a> is carried out by extracting attestation keys from SGX's private quoting enclave that are signed by Intel. The attacker can then masquerade as legitimate Intel machines by signing arbitrary SGX attestation quotes.<sup id="cite_ref-38" class="reference"><a href="#cite_note-38"><span class="cite-bracket">[</span>38<span class="cite-bracket">]</span></a></sup> A security advisory and mitigation for this attack, also called a Processor Data Leakage or Cache Eviction, was originally issued January 27, 2020 and updated May 11, 2021.<sup id="cite_ref-39" class="reference"><a href="#cite_note-39"><span class="cite-bracket">[</span>39<span class="cite-bracket">]</span></a></sup>

</p>

<p>In 2022, security researchers discovered a vulnerability in the <a href="Advanced_Programmable_Interrupt_Controller" title="Advanced Programmable Interrupt Controller">Advanced Programmable Interrupt Controller</a> (APIC) that allows for an attacker with root/admin privileges to gain access to encryption keys via the APIC by inspecting data transfers from L1 and L2 <a href="Cache_(computing)" title="Cache (computing)">cache</a>.<sup id="cite_ref-40" class="reference"><a href="#cite_note-40"><span class="cite-bracket">[</span>40<span class="cite-bracket">]</span></a></sup> This vulnerability is the first architectural attack discovered on <a href="X86" title="X86">x86</a> CPUs. This differs from Spectre and Meltdown which use a noisy <a href="Side-channel_attack" title="Side-channel attack">side channel</a>. This exploit currently affects Intel Core 10th, 11th and 12th generations, and Xeon Ice Lake microprocessors.<sup id="cite_ref-41" class="reference"><a href="#cite_note-41"><span class="cite-bracket">[</span>41<span class="cite-bracket">]</span></a></sup><sup id="cite_ref-42" class="reference"><a href="#cite_note-42"><span class="cite-bracket">[</span>42<span class="cite-bracket">]</span></a></sup>

</p>

<div class="mw-heading mw-heading3"><h3 id="Extraction_of_the_private_key">Extraction of the private key</h3></div>

<p>The code signature is generated with a private key that is only in the enclave. The private key is encoded via “fuse” elements on the chip. In the process, bits are burnt through, giving them the binary value 0. This private key cannot be extracted because it is encoded in the hardware. Mark Ermolov, Maxim Goryachy and Dmitry Sklyarov refuted the claim to trustworthiness of the SGX concept at <a rel="nofollow" class="external free" href="https://github.com/chip-red-pill/glm-ucode#">https://github.com/chip-red-pill/glm-ucode#</a>.

</p>

<div class="mw-heading mw-heading2"><h2 id="SGX_malware_arguments">SGX malware arguments</h2></div>

<p>There has been a long debate on whether SGX enables creation of superior malware. <a href="Oxford_University" class="mw-redirect" title="Oxford University">Oxford University</a> researchers published an article in October 2022<sup id="cite_ref-kucukMalware_43-0" class="reference"><a href="#cite_note-kucukMalware-43"><span class="cite-bracket">[</span>43<span class="cite-bracket">]</span></a></sup> considering attackers' potential advantages and disadvantages by abusing SGX for malware development. Researchers conclude that while there might be temporary zero-day vulnerabilities to abuse in SGX ecosystem, the core principles and design features of Trusted Execution Environments (TEEs) make malware weaker than a malware-in-the-wild, TEEs make no major contributions to malware otherwise.

</p>

<ul><li><a href="Intel_MPX" title="Intel MPX">Intel MPX</a></li>

<li><a href="Spectre-NG" class="mw-redirect" title="Spectre-NG">Spectre-NG</a></li>

<li><a href="Speculative_execution_CPU_vulnerabilities" class="mw-redirect" title="Speculative execution CPU vulnerabilities">Speculative execution CPU vulnerabilities</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

<ul><li><a rel="nofollow" class="external text" href="https://software.intel.com/en-us/isa-extensions/intel-sgx">Intel Software Guard Extensions (Intel SGX)</a> / ISA Extensions, Intel

<ul><li><a rel="nofollow" class="external text" href="https://software.intel.com/sites/default/files/managed/48/88/329298-002.pdf">Intel Software Guard Extensions (Intel SGX) Programming Reference</a> , Intel, October 2014</li>

<li><a rel="nofollow" class="external text" href="https://software.intel.com/sites/default/files/managed/3e/b9/SF15_ISGC003_81_SGX_DL_100_small.pdf">IDF 2015 - Tech Chat: A Primer on Intel Software Guard Extensions</a> , Intel (poster)</li>

<li><a rel="nofollow" class="external text" href="https://software.intel.com/sites/default/files/332680-002.pdf">ISCA 2015 tutorial slides for Intel SGX</a> , Intel, June 2015</li></ul></li>

<li>McKeen, Frank, et al. (Intel), <a rel="nofollow" class="external text" href="http://web.cs.wpi.edu/~guttman/cs557_website/papers/trusted_computing/sgx1.pdf">Innovative Instructions and Software Model for Isolated Execution </a> // Proceedings of the 2nd International Workshop on Hardware and Architectural Support for Security and Privacy. ACM, 2013.</li>

<li>Jackson, Alon, (PhD dissertation). <a rel="nofollow" class="external text" href="https://www.runi.ac.il/media/151p1eou/jackson-msc-thesis.pdf">Trust is in the Keys of the Beholder: Extending SGX Autonomy and Anonymity</a>, May 2017.</li>

<li><a href="Joanna_Rutkowska" title="Joanna Rutkowska">Joanna Rutkowska</a>, <a rel="nofollow" class="external text" href="http://theinvisiblethings.blogspot.ru/2013/08/thoughts-on-intels-upcoming-software.html">Thoughts on Intel's upcoming Software Guard Extensions (Part 1)</a>, August 2013</li>

<li><a rel="nofollow" class="external text" href="https://www.virusbtn.com/virusbulletin/archive/2014/01/vb201401-SGX">SGX: the good, the bad and the downright ugly</a> / Shaun Davenport, Richard Ford (Florida Institute of Technology) / Virus Bulletin, 2014-01-07</li>

<li>Victor Costan and Srinivas Devadas, <a rel="nofollow" class="external text" href="https://eprint.iacr.org/2016/086.pdf">Intel SGX Explained</a>, January 2016.</li>

<li><a rel="nofollow" class="external text" href="https://github.com/wolfSSL/wolfssl">wolfSSL</a>, October 2016.</li>

<li><a rel="nofollow" class="external text" href="https://cdn2.hubspot.net/hubfs/1761386/security-of-intelsgx-key-protection-data-privacy-apps.pdf">The Security of Intel SGX for Key Protection and Data Privacy Applications</a> / Professor Yehuda Lindell (Bar Ilan University & Unbound Tech), January 2018</li>

<li><a rel="nofollow" class="external text" href="https://fortanix.com/blog/2020/03/intel-sgx-technology-and-the-impact-of-processor-side-channel-attacks/">Intel SGX Technology and the Impact of Processor Side-Channel Attacks</a>, March 2020</li>

<li><a rel="nofollow" class="external text" href="https://www.intel.co.uk/content/dam/www/public/emea/uk/en/documents/a1152798-confidential-computing-delivers-personal-shopping.pdf">How Confidential Computing Delivers A Personalised Shopping Experience</a>, January 2021</li>

<li><a rel="nofollow" class="external text" href="https://eya.global/case-studies/realising-the-potential-of-data-whilst-reserving-privacy-with-eya-and">Realising the Potential of Data Whilst Preserving Privacy with EyA and Conclave from R3</a>, December 2021</li>

<li><a rel="nofollow" class="external text" href="https://www.linkedin.com/pulse/introduction-intel-software-guard-extensions-esmond-dsouza/">Introduction to Intel Software Guard Extensions</a>, June 2020</li></ul>

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</style></div><div role="navigation" class="navbox" aria-labelledby="Intel65" style="padding:3px"><table class="nowraplinks hlist mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Intel65" style="font-size:114%;margin:0 4em"><a href="Intel" title="Intel">Intel</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Subsidiaries</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><i><a href="3Dlabs" title="3Dlabs">3Dlabs</a></i></li>

<li><a href="Altera" title="Altera">Altera</a></li>

<li><i><a href="Intel_Security" class="mw-redirect" title="Intel Security">Intel Security</a></i></li>

<li><a href="Mobileye" title="Mobileye">Mobileye</a></li>

<li><a href="Recon_Instruments" title="Recon Instruments">Recon Instruments</a></li>

<li><a href="Virtutech" title="Virtutech">Virtutech</a></li>

<li><a href="Wind_River_Systems" title="Wind River Systems">Wind River Systems</a></li>

<li><a href="Xircom" title="Xircom">Xircom</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Joint venture</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">4Group Holdings (50% owned by <a href="Vantiva" title="Vantiva">Vantiva</a>)</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Products</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="3D_XPoint" title="3D XPoint">3D XPoint</a></li>

<li><a href="Accounts_%26_SSO" title="Accounts & SSO">Accounts & SSO</a></li>

<li><a href="Amplify_Tablet" title="Amplify Tablet">Amplify Tablet</a></li>

<li><a href="Advanced_Programmable_Interrupt_Controller" title="Advanced Programmable Interrupt Controller">Advanced Programmable Interrupt Controller</a></li>

<li><a href="Cache_Acceleration_Software" title="Cache Acceleration Software">Cache Acceleration Software</a></li>

<li><a href="Client_Initiated_Remote_Access" title="Client Initiated Remote Access">Client Initiated Remote Access</a></li>

<li><a href="Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface</a></li>

<li><a href="Flexible_Display_Interface" title="Flexible Display Interface">Flexible Display Interface</a></li>

<li><a href="Hella_Zippy" title="Hella Zippy">Hella Zippy</a></li>

<li><a href="Intel_1103" title="Intel 1103">Intel 1103</a></li>

<li><a href="Intel_AZ210" title="Intel AZ210">Intel AZ210</a></li>

<li><a href="Intel_Clear_Video" title="Intel Clear Video">Intel Clear Video</a></li>

<li><a href="Intel_Display_Power_Saving_Technology" title="Intel Display Power Saving Technology">Intel Display Power Saving Technology</a></li>

<li><a href="Intel_Modular_Server_System" title="Intel Modular Server System">Intel Modular Server System</a></li>

<li><a href="Intel_Quick_Sync_Video" title="Intel Quick Sync Video">Intel Quick Sync Video</a></li>

<li><a href="Intel_Reader" title="Intel Reader">Intel Reader</a></li>

<li><a href="Intel_system_development_kit" title="Intel system development kit">Intel system development kit</a></li>

<li><a href="Intel_Upgrade_Service" title="Intel Upgrade Service">Intel Upgrade Service</a></li>

<li><a href="Intel740" title="Intel740">Intel740</a></li>

<li><a href="InTru3D" title="InTru3D">InTru3D</a></li>

<li><a href="OFono" title="OFono">OFono</a></li>

<li><a href="Performance_acceleration_technology" title="Performance acceleration technology">Performance acceleration technology</a></li>

<li><a href="Intel_Shooting_Star" title="Intel Shooting Star">Shooting Star</a></li>

<li><a href="Stable_Image_Platform_Program" title="Stable Image Platform Program">Stable Image Platform Program</a></li>

<li><a href="Virtual_8086_mode" title="Virtual 8086 mode">Virtual 8086 mode</a></li>

</div><table class="nowraplinks mw-collapsible autocollapse navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Intel_processors144" style="font-size:114%;margin:0 4em"><a href="List_of_Intel_processors" title="List of Intel processors">Intel processors</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Lists</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="List_of_Intel_processors" title="List of Intel processors">Processors</a>

<li><a href="List_of_Intel_Celeron_processors" title="List of Intel Celeron processors">Celeron</a></li>

<li><a href="List_of_Intel_Pentium_processors" title="List of Intel Pentium processors">Pentium</a>

<li><a href="Intel_Quark#List_of_Intel_Quark_processors" title="Intel Quark">Quark</a></li>

<li><a href="List_of_Intel_Itanium_processors" title="List of Intel Itanium processors">Itanium</a></li></ul></li>

<li><a href="List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></li>

<li><a href="List_of_Intel_chipsets" title="List of Intel chipsets">Chipsets</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="List_of_Intel_CPU_microarchitectures" title="List of Intel CPU microarchitectures">Microarchitectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="IA-32" title="IA-32">IA-32</a> (<a href="32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Pentium_M" title="Pentium M">P6 variant (Pentium M)</a></li>

<li><a href="Yonah_(microprocessor)" title="Yonah (microprocessor)">P6 variant (Enhanced Pentium M)</a></li></ul></li>

<li><a href="NetBurst" title="NetBurst">NetBurst</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="X86-64" title="X86-64">x86-64</a> (<a href="64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Penryn_(microarchitecture)" title="Penryn (microarchitecture)">Penryn</a></li></ul></li>

<li><a href="Nehalem_(microarchitecture)" title="Nehalem (microarchitecture)">Nehalem</a>

<ul><li><a href="Westmere_(microarchitecture)" title="Westmere (microarchitecture)">Westmere</a></li></ul></li>

<li><a href="Sandy_Bridge" title="Sandy Bridge">Sandy Bridge</a>

<ul><li><a href="Ivy_Bridge_(microarchitecture)" title="Ivy Bridge (microarchitecture)">Ivy Bridge</a></li></ul></li>

<li><a href="Haswell_(microarchitecture)" title="Haswell (microarchitecture)">Haswell</a>

<ul><li><a href="Broadwell_(microarchitecture)" title="Broadwell (microarchitecture)">Broadwell</a></li></ul></li>

<li><a href="Skylake_(microarchitecture)" title="Skylake (microarchitecture)">Skylake</a>

<ul><li><a href="Cannon_Lake_(microprocessor)" title="Cannon Lake (microprocessor)">Cannon Lake</a></li></ul></li>

<li><a href="Sunny_Cove_(microarchitecture)" title="Sunny Cove (microarchitecture)">Sunny Cove</a>

<ul><li><a href="Cypress_Cove_(microarchitecture)" class="mw-redirect" title="Cypress Cove (microarchitecture)">Cypress Cove</a></li></ul></li>

<li><a href="Willow_Cove" title="Willow Cove">Willow Cove</a></li>

<li><a href="Golden_Cove" title="Golden Cove">Golden Cove</a>

<ul><li><a href="Raptor_Cove" class="mw-redirect" title="Raptor Cove">Raptor Cove</a></li></ul></li>

<li>Redwood Cove</li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="X86" title="X86">x86</a> <a href="Ultra-low-voltage_processor" title="Ultra-low-voltage processor">ULV</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Bonnell_(microarchitecture)" title="Bonnell (microarchitecture)">Bonnell</a>

<ul><li><a href="Saltwell_(microarchitecture)" class="mw-redirect" title="Saltwell (microarchitecture)">Saltwell</a></li>

<li><a href="Silvermont" title="Silvermont">Silvermont</a></li></ul></li>

<li><a href="Goldmont" title="Goldmont">Goldmont</a>

<ul><li><a href="Goldmont_Plus" title="Goldmont Plus">Goldmont Plus</a></li></ul></li>

<li><a href="Tremont_(microarchitecture)" title="Tremont (microarchitecture)">Tremont</a>

<ul><li><a href="Gracemont_(microarchitecture)" title="Gracemont (microarchitecture)">Gracemont</a></li></ul></li>

<li>Crestmont</li></ul>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Current products</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th id="x86-64_(64-bit)40" scope="row" class="navbox-group" style="width:8.5em"><a href="X86-64" title="X86-64">x86-64</a> (<a href="64-bit_computing" title="64-bit computing">64-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="padding:0"><div style="padding:0 0.25em">

<li><a href="Celeron" title="Celeron">Celeron</a></li>

<li><a href="Pentium" title="Pentium">Pentium</a></li>

<li><a href="Intel_Core#Core_and_Core_Ultra_3/5/7/9" title="Intel Core">Core Ultra</a>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Discontinued</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Binary-coded_decimal" title="Binary-coded decimal">BCD</a> oriented (<a href="4-bit_computing" title="4-bit computing">4-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">pre-x86 (<a href="8-bit_computing" title="8-bit computing">8-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Early <a href="X86" title="X86">x86</a> (<a href="16-bit_computing" title="16-bit computing">16-bit</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="X87" title="X87">x87</a> (external <a href="Floating-point_unit" title="Floating-point unit">FPUs</a>)</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<dl><dt>8/16-bit databus</dt>

<dt>16-bit databus</dt>

<dt>32-bit databus</dt>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="IA-32" title="IA-32">IA-32</a> (<a href="32-bit_computing" title="32-bit computing">32-bit</a> x86)</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="RapidCAD" title="RapidCAD">RapidCAD</a></li>

<li><a href="I486_OverDrive" title="I486 OverDrive">OverDrive</a></li></ul></li>

<li><a href="Celeron" title="Celeron">Celeron</a> (1998)

<li><a href="Pentium" title="Pentium">Pentium</a>

<ul><li><a href="Pentium_(original)" title="Pentium (original)">Original i586</a></li>

<li><a href="Pentium_OverDrive" title="Pentium OverDrive">OverDrive</a></li>

<ul><li><a href="List_of_Intel_P6-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel P6-based Xeon microprocessors">P6-based</a></li>

<li><a href="List_of_Intel_NetBurst-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel NetBurst-based Xeon microprocessors">NetBurst-based</a></li>

<li><a href="List_of_Intel_Core-based_Xeon_microprocessors" class="mw-redirect" title="List of Intel Core-based Xeon microprocessors">Core-based</a></li></ul></li>

<li><a href="Intel_Quark" title="Intel Quark">Quark</a></li>

<li><a href="Tolapai" title="Tolapai">Tolapai</a></li></ul>

<li><a href="Celeron" title="Celeron">Celeron</a>

<li><a href="Pentium" title="Pentium">Pentium</a>

<li><a href="Pentium_D#Smithfield_XE" title="Pentium D">Extreme Edition</a></li>

<ul><li><a href="List_of_Intel_Xeon_processors_(Nehalem-based)" title="List of Intel Xeon processors (Nehalem-based)">Nehalem-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Sandy_Bridge-based)" title="List of Intel Xeon processors (Sandy Bridge-based)">Sandy Bridge-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Ivy_Bridge-based)" title="List of Intel Xeon processors (Ivy Bridge-based)">Ivy Bridge-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Haswell-based)" title="List of Intel Xeon processors (Haswell-based)">Haswell-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Broadwell-based)" title="List of Intel Xeon processors (Broadwell-based)">Broadwell-based</a></li>

<li><a href="List_of_Intel_Xeon_processors_(Skylake-based)" title="List of Intel Xeon processors (Skylake-based)">Skylake-based</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Other</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<dd><a href="Itanium" title="Itanium">Itanium</a></dd>

<dd><a href="StrongARM" title="StrongARM">StrongARM</a></dd>

<dd><a href="XScale" title="XScale">XScale</a></dd></dl>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li>

<li><a href="Process%E2%80%93architecture%E2%80%93optimization_model" title="Process–architecture–optimization model">Process–architecture–optimization model</a></li>

<li><a href="List_of_Intel_graphics_processing_units" title="List of Intel graphics processing units">Intel GPUs</a>

<li><a href="Intel_Graphics_Technology" title="Intel Graphics Technology">Intel HD, UHD, and Iris Graphics</a></li>

<li><a href="PCI_IDE_ISA_Xcelerator" class="mw-redirect" title="PCI IDE ISA Xcelerator">PIIXs</a></li>

<li><a href="Stratix" title="Stratix">Stratix</a></li>

<li><a href="List_of_Intel_codenames" title="List of Intel codenames">Codenames</a></li>

<li><a href="Larrabee_(microarchitecture)" title="Larrabee (microarchitecture)">Larrabee</a></li></ul>

</div></td></tr></tbody></table><div>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Litigation</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Advanced_Micro_Devices%2C_Inc._v._Intel_Corp." title="Advanced Micro Devices, Inc. v. Intel Corp.">Advanced Micro Devices, Inc. v. Intel Corp.</a></li>

<li><a href="High-Tech_Employee_Antitrust_Litigation" title="High-Tech Employee Antitrust Litigation">High-Tech Employee Antitrust Litigation</a></li>

<li><a href="Intel_Corp._v._Advanced_Micro_Devices%2C_Inc." title="Intel Corp. v. Advanced Micro Devices, Inc.">Intel Corp. v. Advanced Micro Devices, Inc.</a></li>

<li><a href="Intel_Corp._v._Hamidi" title="Intel Corp. v. Hamidi">Intel Corp. v. Hamidi</a></li>

<li><a href="Intel_Corporation_Inc._v_CPM_United_Kingdom_Ltd" class="mw-redirect" title="Intel Corporation Inc. v CPM United Kingdom Ltd">Intel Corporation Inc. v CPM United Kingdom Ltd</a></li>

<li><a href="Silvaco_Data_Systems_v._Intel_Corp." title="Silvaco Data Systems v. Intel Corp.">Silvaco Data Systems v. Intel Corp.</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">People</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Founders</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Gordon_Moore" title="Gordon Moore">Gordon Moore</a></li>

<li><a href="Robert_Noyce" title="Robert Noyce">Robert Noyce</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">CEOs</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li>Robert Noyce</li>

<li>Gordon Moore</li>

<li><a href="Andrew_Grove" title="Andrew Grove">Andrew Grove</a></li>

<li><a href="Craig_Barrett_(chief_executive)" title="Craig Barrett (chief executive)">Craig Barrett</a></li>

<li><a href="Paul_Otellini" title="Paul Otellini">Paul Otellini</a></li>

<li><a href="Brian_Krzanich" title="Brian Krzanich">Brian Krzanich</a></li>

<li><a href="Pat_Gelsinger" title="Pat Gelsinger">Pat Gelsinger</a></li>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Intel_Foundation_Achievement_Award" title="Intel Foundation Achievement Award">Intel Foundation Achievement Award</a></li>

<li><a href="Mac_transition_to_Intel_processors" title="Mac transition to Intel processors">Mac transition to Intel processors</a></li>

<li><a href="Intel_Architecture_Labs" title="Intel Architecture Labs">Intel Architecture Labs</a></li>

<li><a href="Classmate_PC" title="Classmate PC">Classmate PC</a></li>

<li><a href="Convera_Corporation" title="Convera Corporation">Convera Corporation</a></li>

<li><a href="Copy_Exactly!" title="Copy Exactly!">Copy Exactly!</a></li>

<li><a href="Intel_Developer_Forum" title="Intel Developer Forum">Intel Developer Forum</a></li>

<li><a href="Dynamic_video_memory_technology" title="Dynamic video memory technology">Dynamic video memory technology</a></li>

<li><a href="Intel_Extreme_Masters" title="Intel Extreme Masters">Intel Extreme Masters</a></li>

<li><a href="List_of_Intel_microprocessors" class="mw-redirect" title="List of Intel microprocessors">List of Intel microprocessors</a></li>

<li><a href="List_of_Intel_graphics_processing_units_(2013_or_earlier)" class="mw-redirect" title="List of Intel graphics processing units (2013 or earlier)">List of Intel graphics processing units (2013 or earlier)</a></li>

<li><a href="I/O_Acceleration_Technology" title="I/O Acceleration Technology">I/O Acceleration Technology</a></li>

<li><a href="IA-32_Execution_Layer" title="IA-32 Execution Layer">IA-32 Execution Layer</a></li>

<li><a href="IM_Flash_Technologies" title="IM Flash Technologies">IM Flash Technologies</a></li>

<li><i><a href="The_Innovators_(book)" title="The Innovators (book)">The Innovators</a></i></li>

<li><a href="Inside_Films" title="Inside Films">Inside Films</a>

<ul><li><i><a href="Inside_(2011_film)" title="Inside (2011 film)">Inside</a></i></li>

<li><i><a href="The_Beauty_Inside_(web_series)" title="The Beauty Inside (web series)">The Beauty Inside</a></i></li>

<li><i><a href="The_Power_Inside" title="The Power Inside">The Power Inside</a></i></li></ul></li>

<li><a href="Intel_ADX" title="Intel ADX">Intel ADX</a></li>

<li><a href="Intel_Capital" title="Intel Capital">Intel Capital</a></li>

<li><a href="Intel_Cluster_Ready" title="Intel Cluster Ready">Intel Cluster Ready</a></li>

<li><a href="Intel_Compute_Stick" title="Intel Compute Stick">Intel Compute Stick</a></li>

<li><a href="Intel_Ireland" title="Intel Ireland">Intel Ireland</a></li>

<li><a href="Intel_Mobile_Communications" title="Intel Mobile Communications">Intel Mobile Communications</a></li>

<li><a href="Intel_Outstanding_Researcher_Award" title="Intel Outstanding Researcher Award">Intel Outstanding Researcher Award</a></li>

<li><a href="Intel_SHA_extensions" class="mw-redirect" title="Intel SHA extensions">Intel SHA extensions</a></li>

<li><a href="Intel_Teach" title="Intel Teach">Intel Teach</a></li>

<li><a href="List_of_semiconductor_fabrication_plants" title="List of semiconductor fabrication plants">List of semiconductor fabrication plants</a></li>

<li><a href="List_of_Intel_manufacturing_sites" title="List of Intel manufacturing sites">List of Intel manufacturing sites</a></li>

<li><a href="List_of_mergers_and_acquisitions_by_Intel" title="List of mergers and acquisitions by Intel">List of mergers and acquisitions by Intel</a></li>

<li><a href="Intel_Museum" title="Intel Museum">Intel Museum</a></li>

<li><a href="OnCue" class="mw-redirect" title="OnCue">OnCue</a></li>

<li><a href="Intel_PRO/Wireless" title="Intel PRO/Wireless">Intel PRO/Wireless</a></li>

<li><a href="Intel_International_Science_and_Engineering_Fair" class="mw-redirect" title="Intel International Science and Engineering Fair">Intel International Science and Engineering Fair</a></li>

<li><a href="Regeneron_Science_Talent_Search" title="Regeneron Science Talent Search">Regeneron Science Talent Search</a></li>

<li><a href="Simple_Firmware_Interface" title="Simple Firmware Interface">Simple Firmware Interface</a></li>

<li><a href="Single-chip_Cloud_Computer" title="Single-chip Cloud Computer">Single-chip Cloud Computer</a></li>

<li><a href="Supervisor_Mode_Access_Prevention" title="Supervisor Mode Access Prevention">Supervisor Mode Access Prevention</a></li>

<li><a href="Tarari_(company)" class="mw-redirect" title="Tarari (company)">Tarari</a></li>

<li><a href="Intel_Tera-Scale" title="Intel Tera-Scale">Intel Tera-Scale</a></li>

<li><a href="Timeline_of_Intel" title="Timeline of Intel">Timeline of Intel</a></li></ul>

</div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Processor_technologies439" style="padding:3px"><table class="nowraplinks mw-collapsible mw-collapsed navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Processor_technologies439" style="font-size:114%;margin:0 4em"><a href="Processor_(computing)" title="Processor (computing)">Processor technologies</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Model_of_computation" title="Model of computation">Models</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Abstract_machine" title="Abstract machine">Abstract machine</a></li>

<li><a href="Stored-program_computer" title="Stored-program computer">Stored-program computer</a></li>

<li><a href="Finite-state_machine" title="Finite-state machine">Finite-state machine</a>

<ul><li><a href="Finite-state_machine_with_datapath" class="mw-redirect" title="Finite-state machine with datapath">with datapath</a></li>

<li><a href="Hierarchical_state_machine" class="mw-redirect" title="Hierarchical state machine">Hierarchical</a></li>

<li><a href="Deterministic_finite_automaton" title="Deterministic finite automaton">Deterministic finite automaton</a></li>

<li><a href="Queue_automaton" title="Queue automaton">Queue automaton</a></li>

<li><a href="Cellular_automaton" title="Cellular automaton">Cellular automaton</a></li>

<li><a href="Quantum_cellular_automaton" title="Quantum cellular automaton">Quantum cellular automaton</a></li></ul></li>

<li><a href="Turing_machine" title="Turing machine">Turing machine</a>

<ul><li><a href="Alternating_Turing_machine" title="Alternating Turing machine">Alternating Turing machine</a></li>

<li><a href="Universal_Turing_machine" title="Universal Turing machine">Universal</a></li>

<li><a href="Post%E2%80%93Turing_machine" title="Post–Turing machine">Post–Turing</a></li>

<li><a href="Quantum_Turing_machine" title="Quantum Turing machine">Quantum</a></li>

<li><a href="Nondeterministic_Turing_machine" title="Nondeterministic Turing machine">Nondeterministic Turing machine</a></li>

<li><a href="Probabilistic_Turing_machine" title="Probabilistic Turing machine">Probabilistic Turing machine</a></li>

<li><a href="Hypercomputation" title="Hypercomputation">Hypercomputation</a></li>

<li><a href="Zeno_machine" title="Zeno machine">Zeno machine</a></li></ul></li>

<li><a href="History_of_general-purpose_CPUs#Belt_machine_architecture" title="History of general-purpose CPUs">Belt machine</a></li>

<li><a href="Stack_machine" title="Stack machine">Stack machine</a></li>

<li><a href="Register_machine" title="Register machine">Register machines</a>

<ul><li><a href="Counter_machine" title="Counter machine">Counter</a></li>

<li><a href="Pointer_machine" title="Pointer machine">Pointer</a></li>

<li><a href="Random-access_machine" title="Random-access machine">Random-access</a></li>

<li><a href="Random-access_stored-program_machine" title="Random-access stored-program machine">Random-access stored program</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Computer_architecture" title="Computer architecture">Architecture</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Microarchitecture" title="Microarchitecture">Microarchitecture</a></li>

<li><a href="Von_Neumann_architecture" title="Von Neumann architecture">Von Neumann</a></li>

<li><a href="Harvard_architecture" title="Harvard architecture">Harvard</a>

<ul><li><a href="Modified_Harvard_architecture" title="Modified Harvard architecture">modified</a></li></ul></li>

<li><a href="Dataflow_architecture" title="Dataflow architecture">Dataflow</a></li>

<li><a href="Transport_triggered_architecture" title="Transport triggered architecture">Transport-triggered</a></li>

<li><a href="Cellular_architecture" title="Cellular architecture">Cellular</a></li>

<li><a href="Endianness" title="Endianness">Endianness</a></li>

<li><a href="Computer_data_storage" title="Computer data storage">Memory access</a>

<li><a href="Load%E2%80%93store_architecture" title="Load–store architecture">Load–store</a></li>

<li><a href="Register%E2%80%93memory_architecture" title="Register–memory architecture">Register/memory</a></li></ul></li>

<li><a href="Cache_hierarchy" title="Cache hierarchy">Cache hierarchy</a></li>

<li><a href="Memory_hierarchy" title="Memory hierarchy">Memory hierarchy</a>

<ul><li><a href="Virtual_memory" title="Virtual memory">Virtual memory</a></li>

<li><a href="Secondary_storage" class="mw-redirect" title="Secondary storage">Secondary storage</a></li></ul></li>

<li><a href="Heterogeneous_System_Architecture" title="Heterogeneous System Architecture">Heterogeneous</a></li>

<li><a href="Fabric_computing" title="Fabric computing">Fabric</a></li>

<li><a href="Multiprocessing" title="Multiprocessing">Multiprocessing</a></li>

<li><a href="Cognitive_computing" title="Cognitive computing">Cognitive</a></li>

<li><a href="Neuromorphic_engineering" class="mw-redirect" title="Neuromorphic engineering">Neuromorphic</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_set_architecture" title="Instruction set architecture">Instruction set<br>architectures</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Types</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Orthogonal_instruction_set" title="Orthogonal instruction set">Orthogonal instruction set</a></li>

<li><a href="Application-specific_instruction_set_processor" title="Application-specific instruction set processor">Application-specific</a></li>

<ul><li><a href="TRIPS_architecture" title="TRIPS architecture">TRIPS</a></li></ul></li>

<li><a href="VISC_architecture" title="VISC architecture">VISC architecture</a></li>

<li><a href="Quantum_computing" title="Quantum computing">Quantum computing</a></li>

<li><a href="Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Comparison</a>

<ul><li><a href="Addressing_mode" title="Addressing mode">Addressing modes</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Instruction<br>sets</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Motorola_68000_series" title="Motorola 68000 series">Motorola 68000 series</a></li>

<li><a href="Stanford_MIPS" title="Stanford MIPS">Stanford MIPS</a></li>

<li>Power

<ul><li><a href="IBM_POWER_architecture" title="IBM POWER architecture">POWER</a></li>

<li><a href="PowerPC" title="PowerPC">PowerPC</a></li>

<li><a href="Power_ISA" title="Power ISA">Power ISA</a></li></ul></li>

<li><a href="Clipper_architecture" title="Clipper architecture">Clipper architecture</a></li>

<li><a href="SPARC" title="SPARC">SPARC</a></li>

<li><a href="SuperH" title="SuperH">SuperH</a></li>

<li><a href="DEC_Alpha" title="DEC Alpha">DEC Alpha</a></li>

<li><a href="ETRAX_CRIS" title="ETRAX CRIS">ETRAX CRIS</a></li>

<li><a href="Unicore" title="Unicore">Unicore</a></li>

<li><a href="IA-64" title="IA-64">Itanium</a></li>

<li><a href="OpenRISC" title="OpenRISC">OpenRISC</a></li>

<li><a href="MicroBlaze" title="MicroBlaze">MicroBlaze</a></li>

<li>System/3x0

<li><a href="Z/Architecture" title="Z/Architecture">z/Architecture</a></li></ul></li>

<li>Tilera ISA</li>

<li><a href="VISC_architecture" title="VISC architecture">VISC architecture</a></li>

<li><a href="Adapteva" class="mw-redirect" title="Adapteva">Epiphany architecture</a></li>

<li><a href="Comparison_of_instruction_set_architectures" title="Comparison of instruction set architectures">Others</a></li></ul>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_cycle" title="Instruction cycle">Execution</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_pipelining" title="Instruction pipelining">Instruction pipelining</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Pipeline_stall" title="Pipeline stall">Pipeline stall</a></li>

<li><a href="Operand_forwarding" title="Operand forwarding">Operand forwarding</a></li>

<li><a href="Classic_RISC_pipeline" title="Classic RISC pipeline">Classic RISC pipeline</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hazard_(computer_architecture)" title="Hazard (computer architecture)">Hazards</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Data_dependency" title="Data dependency">Data dependency</a></li>

<li><a href="Structural_hazard" class="mw-redirect" title="Structural hazard">Structural</a></li>

<li><a href="Control_hazard" class="mw-redirect" title="Control hazard">Control</a></li>

<li><a href="False_sharing" title="False sharing">False sharing</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Out-of-order_execution" title="Out-of-order execution">Out-of-order</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Scoreboarding" title="Scoreboarding">Scoreboarding</a></li>

<li><a href="Tomasulo's_algorithm" title="Tomasulo's algorithm">Tomasulo's algorithm</a>

<ul><li><a href="Reservation_station" title="Reservation station">Reservation station</a></li>

<li><a href="Re-order_buffer" title="Re-order buffer">Re-order buffer</a></li></ul></li>

<li><a href="Register_renaming" title="Register renaming">Register renaming</a></li>

<li><a href="Wide-issue" title="Wide-issue">Wide-issue</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Speculative_execution" title="Speculative execution">Speculative</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Branch_predictor" title="Branch predictor">Branch prediction</a></li>

<li><a href="Memory_dependence_prediction" title="Memory dependence prediction">Memory dependence prediction</a></li></ul>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Parallel_computing" title="Parallel computing">Parallelism</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Level</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Bit-serial_architecture" title="Bit-serial architecture">Bit-serial</a></li>

<li><a href="Instruction-level_parallelism" title="Instruction-level parallelism">Instruction</a></li>

<li><a href="Instruction_pipelining" title="Instruction pipelining">Pipelining</a>

<ul><li><a href="Scalar_processor" title="Scalar processor">Scalar</a></li>

<li><a href="Superscalar_processor" title="Superscalar processor">Superscalar</a></li></ul></li>

<ul><li><a href="Thread_(computing)" title="Thread (computing)">Thread</a></li>

<li><a href="Process_(computing)" title="Process (computing)">Process</a></li></ul></li>

<ul><li><a href="Vector_processor" title="Vector processor">Vector</a></li></ul></li>

<li><a href="Memory-level_parallelism" title="Memory-level parallelism">Memory</a></li>

<li><a href="Distributed_architecture" class="mw-redirect" title="Distributed architecture">Distributed</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Multithreading_(computer_architecture)" title="Multithreading (computer architecture)">Multithreading</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Temporal_multithreading" title="Temporal multithreading">Temporal</a></li>

<li><a href="Simultaneous_multithreading" title="Simultaneous multithreading">Simultaneous</a>

<ul><li><a href="Hyper-threading" title="Hyper-threading">Hyperthreading</a></li>

<li><a href="Simultaneous_and_heterogeneous_multithreading" title="Simultaneous and heterogeneous multithreading">Simultaneous and heterogenous</a></li></ul></li>

<li><a href="Speculative_multithreading" title="Speculative multithreading">Speculative</a></li>

<li><a href="Preemption_(computing)" title="Preemption (computing)">Preemptive</a></li>

<li><a href="Cooperative_multitasking" title="Cooperative multitasking">Cooperative</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Flynn's_taxonomy" title="Flynn's taxonomy">Flynn's taxonomy</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Single_instruction%2C_multiple_threads" title="Single instruction, multiple threads">Array processing (SIMT)</a></li>

<li><a href="Flynn's_taxonomy#Pipelined_processor" title="Flynn's taxonomy">Pipelined processing</a></li>

<li><a href="Flynn's_taxonomy#Associative_processor" title="Flynn's taxonomy">Associative processing</a></li>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Computer_performance" title="Computer performance">Processor<br>performance</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Transistor_count" title="Transistor count">Transistor count</a></li>

<li><a href="Instructions_per_cycle" title="Instructions per cycle">Instructions per cycle</a> (IPC)

<ul><li><a href="Cycles_per_instruction" title="Cycles per instruction">Cycles per instruction</a> (CPI)</li></ul></li>

<li><a href="Instructions_per_second" title="Instructions per second">Instructions per second</a> (IPS)</li>

<li><a href="FLOPS" class="mw-redirect" title="FLOPS">Floating-point operations per second</a> (FLOPS)</li>

<li><a href="Transactions_per_second" title="Transactions per second">Transactions per second</a> (TPS)</li>

<li><a href="SUPS" title="SUPS">Synaptic updates per second</a> (SUPS)</li>

<li><a href="Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li>

<li><a href="Cache_performance_measurement_and_metric" title="Cache performance measurement and metric">Cache performance metrics</a></li>

<li><a href="Computer_performance_by_orders_of_magnitude" title="Computer performance by orders of magnitude">Computer performance by orders of magnitude</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Processor_(computing)" title="Processor (computing)">Types</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Central_processing_unit" title="Central processing unit">Central processing unit</a> (CPU)</li>

<li><a href="Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)

<ul><li><a href="General-purpose_computing_on_graphics_processing_units" title="General-purpose computing on graphics processing units">GPGPU</a></li></ul></li>

<li><a href="Vector_processor" title="Vector processor">Vector</a></li>

<li><a href="Barrel_processor" title="Barrel processor">Barrel</a></li>

<li><a href="Stream_processing" title="Stream processing">Stream</a></li>

<li><a href="Tile_processor" title="Tile processor">Tile processor</a></li>

<li><a href="Coprocessor" title="Coprocessor">Coprocessor</a></li>

<li><a href="Multi-chip_module" title="Multi-chip module">Multi-chip module</a> (MCM)</li>

<li><a href="System_in_a_package" title="System in a package">System in a package</a> (SiP)</li>

<li><a href="Package_on_a_package" title="Package on a package">Package on a package</a> (PoP)</li></ul>

</div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">By application</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Embedded_system" title="Embedded system">Embedded system</a></li>

<li><a href="Microprocessor" title="Microprocessor">Microprocessor</a></li>

<li><a href="Microcontroller" title="Microcontroller">Microcontroller</a></li>

<li><a href="Mobile_processor" title="Mobile processor">Mobile</a></li>

<li><a href="Ultra-low-voltage_processor" title="Ultra-low-voltage processor">Ultra-low-voltage</a></li>

<li><a href="Soft_microprocessor" title="Soft microprocessor">Soft microprocessor</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Systems<br>on chip</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="System_on_a_chip" title="System on a chip">System on a chip</a> (SoC)</li>

<li><a href="Multiprocessor_system_on_a_chip" class="mw-redirect" title="Multiprocessor system on a chip">Multiprocessor</a> (MPSoC)</li>

<li><a href="Cypress_PSoC" title="Cypress PSoC">Cypress PSoC</a></li>

<li><a href="Network_on_a_chip" title="Network on a chip">Network on a chip</a> (NoC)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware_acceleration" title="Hardware acceleration">Hardware<br>accelerators</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Coprocessor" title="Coprocessor">Coprocessor</a></li>

<li><a href="AI_accelerator" class="mw-redirect" title="AI accelerator">AI accelerator</a></li>

<li><a href="Graphics_processing_unit" title="Graphics processing unit">Graphics processing unit</a> (GPU)</li>

<li><a href="Image_processor" title="Image processor">Image processor</a></li>

<li><a href="Vision_processing_unit" title="Vision processing unit">Vision processing unit</a> (VPU)</li>

<li><a href="Physics_processing_unit" title="Physics processing unit">Physics processing unit</a> (PPU)</li>

<li><a href="Digital_signal_processor" title="Digital signal processor">Digital signal processor</a> (DSP)</li>

<li><a href="Tensor_Processing_Unit" title="Tensor Processing Unit">Tensor Processing Unit</a> (TPU)</li>

<li><a href="Secure_cryptoprocessor" title="Secure cryptoprocessor">Secure cryptoprocessor</a></li>

<li><a href="Network_processor" title="Network processor">Network processor</a></li>

<li><a href="Baseband_processor" title="Baseband processor">Baseband processor</a></li></ul>

</div></td></tr></tbody></table><div>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Word_(computer_architecture)" title="Word (computer architecture)">Word size</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Bit_slicing" title="Bit slicing">bit slicing</a></li>

<li><a href="Word_(computer_architecture)#Table_of_word_sizes" title="Word (computer architecture)">others</a>

<ul><li><a href="Word_(computer_architecture)#Variable-word_architectures" title="Word (computer architecture)">variable</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Core count</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Single-core" title="Single-core">Single-core</a></li>

<li><a href="Multi-core_processor" title="Multi-core processor">Multi-core</a></li>

<li><a href="Manycore_processor" title="Manycore processor">Manycore</a></li>

<li><a href="Heterogeneous_computing" title="Heterogeneous computing">Heterogeneous architecture</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Components</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Cache_(computing)" title="Cache (computing)">Cache</a>

<ul><li><a href="CPU_cache" title="CPU cache">CPU cache</a></li>

<li><a href="Scratchpad_memory" title="Scratchpad memory">Scratchpad memory</a></li>

<li><a href="Data_cache" class="mw-redirect" title="Data cache">Data cache</a></li>

<li><a href="Instruction_cache" class="mw-redirect" title="Instruction cache">Instruction cache</a></li>

<li><a href="Cache_replacement_policies" title="Cache replacement policies">replacement policies</a></li>

<li><a href="Cache_coherence" title="Cache coherence">coherence</a></li></ul></li>

<li><a href="Clock_rate" title="Clock rate">Clock rate</a></li>

<li><a href="Clock_signal" title="Clock signal">Clock signal</a></li>

</div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Execution_unit" title="Execution unit">Functional<br>units</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Arithmetic_logic_unit" title="Arithmetic logic unit">Arithmetic logic unit</a> (ALU)</li>

<li><a href="Address_generation_unit" title="Address generation unit">Address generation unit</a> (AGU)</li>

<li><a href="Floating-point_unit" title="Floating-point unit">Floating-point unit</a> (FPU)</li>

<li><a href="Memory_management_unit" title="Memory management unit">Memory management unit</a> (MMU)

<ul><li><a href="Load%E2%80%93store_unit" title="Load–store unit">Load–store unit</a></li>

<li><a href="Translation_lookaside_buffer" title="Translation lookaside buffer">Translation lookaside buffer</a> (TLB)</li></ul></li>

<li><a href="Branch_predictor" title="Branch predictor">Branch predictor</a></li>

<li><a href="Branch_target_predictor" title="Branch target predictor">Branch target predictor</a></li>

<li><a href="Memory_controller" title="Memory controller">Integrated memory controller</a> (IMC)

<ul><li><a href="Memory_management_unit" title="Memory management unit">Memory management unit</a></li></ul></li>

<li><a href="Instruction_decoder" class="mw-redirect" title="Instruction decoder">Instruction decoder</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Logic_gate" title="Logic gate">Logic</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Combinational_logic" title="Combinational logic">Combinational</a></li>

<li><a href="Sequential_logic" title="Sequential logic">Sequential</a></li>

<li><a href="Logic_gate" title="Logic gate">Logic gate</a>

<ul><li><a href="Quantum_logic_gate" title="Quantum logic gate">Quantum</a></li>

<li><a href="Gate_array" title="Gate array">Array</a></li></ul></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware_register" title="Hardware register">Registers</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Processor_register" title="Processor register">Processor register</a></li>

<li><a href="Status_register" title="Status register">Status register</a></li>

<li><a href="Stack_register" title="Stack register">Stack register</a></li>

<li><a href="Register_file" title="Register file">Register file</a></li>

<li><a href="Memory_buffer_register" title="Memory buffer register">Memory buffer</a></li>

<li><a href="Memory_address_register" title="Memory address register">Memory address register</a></li>

<li><a href="Program_counter" title="Program counter">Program counter</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Control_unit" title="Control unit">Control unit</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Hardwired_control_unit" class="mw-redirect" title="Hardwired control unit">Hardwired control unit</a></li>

<li><a href="Instruction_unit" title="Instruction unit">Instruction unit</a></li>

<li><a href="Data_buffer" title="Data buffer">Data buffer</a></li>

<li><a href="Write_buffer" title="Write buffer">Write buffer</a></li>

<li><a href="Microcode" title="Microcode">Microcode</a> <a href="ROM_image" title="ROM image">ROM</a></li>

<li><a href="Counter_(digital)" title="Counter (digital)">Counter</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Datapath" title="Datapath">Datapath</a></th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Multiplexer" title="Multiplexer">Multiplexer</a></li>

<li><a href="Demultiplexer" class="mw-redirect" title="Demultiplexer">Demultiplexer</a></li>

<li><a href="Adder_(electronics)" title="Adder (electronics)">Adder</a></li>

<li><a href="Binary_multiplier" title="Binary multiplier">Multiplier</a>

<li><a href="Binary_decoder" title="Binary decoder">Binary decoder</a>

<ul><li><a href="Address_decoder" title="Address decoder">Address decoder</a></li>

<li><a href="Sum-addressed_decoder" title="Sum-addressed decoder">Sum-addressed decoder</a></li></ul></li>

<li><a href="Barrel_shifter" title="Barrel shifter">Barrel shifter</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Electronic_circuit" title="Electronic circuit">Circuitry</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Integrated_circuit" title="Integrated circuit">Integrated circuit</a>

<li><a href="Mixed-signal_integrated_circuit" title="Mixed-signal integrated circuit">Mixed-signal</a></li>

<li><a href="Power_management_integrated_circuit" title="Power management integrated circuit">Power management</a></li></ul></li>

<li><a href="Boolean_circuit" title="Boolean circuit">Boolean</a></li>

<li><a href="Circuit_(computer_science)" title="Circuit (computer science)">Digital</a></li>

<li><a href="Analogue_electronics" title="Analogue electronics">Analog</a></li>

<li><a href="Quantum_circuit" title="Quantum circuit">Quantum</a></li>

<li><a href="Switch#Electronic_switches" title="Switch">Switch</a></li></ul>

</div></td></tr></tbody></table><div>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Power_management" title="Power management">Power<br>management</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Dynamic_frequency_scaling" title="Dynamic frequency scaling">Dynamic frequency scaling</a></li>

<li><a href="Dynamic_voltage_scaling" title="Dynamic voltage scaling">Dynamic voltage scaling</a></li>

<li><a href="Clock_gating" title="Clock gating">Clock gating</a></li>

<li><a href="Performance_per_watt" title="Performance per watt">Performance per watt</a> (PPW)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="History_of_general-purpose_CPUs" title="History of general-purpose CPUs">History of general-purpose CPUs</a></li>

<li><a href="Microprocessor_chronology" title="Microprocessor chronology">Microprocessor chronology</a></li>

<li><a href="Processor_design" title="Processor design">Processor design</a></li>

<li><a href="Digital_electronics" title="Digital electronics">Digital electronics</a></li>

<li><a href="Hardware_security_module" title="Hardware security module">Hardware security module</a></li>

<li><a href="Semiconductor_device_fabrication" title="Semiconductor device fabrication">Semiconductor device fabrication</a></li>

<li><a href="Tick%E2%80%93tock_model" title="Tick–tock model">Tick–tock model</a></li>

<li><a href="Pin_grid_array" title="Pin grid array">Pin grid array</a></li>

<li><a href="Chip_carrier" title="Chip carrier">Chip carrier</a></li></ul>

</div></td></tr></tbody></table></div>

<p><br>

</p>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Multimedia_Instruction_set_extensions305" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Multimedia_Instruction_set_extensions305" style="font-size:114%;margin:0 4em"><a href="Multimedia" title="Multimedia">Multimedia</a> <a href="Instruction_set_architecture" title="Instruction set architecture">Instruction set</a> <a href="Processor_supplementary_capability" title="Processor supplementary capability">extensions</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Single_instruction%2C_multiple_data" title="Single instruction, multiple data">SIMD</a> (<a href="Reduced_instruction_set_computer" title="Reduced instruction set computer">RISC</a>)</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="DEC_Alpha" title="DEC Alpha">Alpha</a>

<li><a href="Power_ISA" title="Power ISA">Power ISA</a>

<li><a href="SPARC" title="SPARC">SPARC</a>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Single_instruction%2C_multiple_data" title="Single instruction, multiple data">SIMD</a> (<a href="X86" title="X86">x86</a>)</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>Suspended extensions' dates are <s>struck through</s>.</div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Instruction_set_extensions506" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Instruction_set_extensions506" style="font-size:114%;margin:0 4em"><a href="Instruction_set_architecture" title="Instruction set architecture">Instruction set</a> <a href="Processor_supplementary_capability" title="Processor supplementary capability">extensions</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Single_instruction%2C_multiple_data" title="Single instruction, multiple data">SIMD</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Power_ISA" title="Power ISA">Power ISA</a>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Bit_manipulation_instructions" title="Bit manipulation instructions">Bit manipulation</a> <br> <a href="Find_first_set" title="Find first set">Find first set</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="X86_Bit_manipulation_instruction_set" title="X86 Bit manipulation instruction set">Intel BMI</a> (ABM: 2007, BMI1: 2012, BMI2: 2013, TBM: 2012)</li>

<li><a href="Intel_ADX" title="Intel ADX">Intel ADX</a> (2014)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Instruction_set_architecture#Code_density" title="Instruction set architecture">Compressed<br> instructions</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="ARM_architecture_family#Thumb" title="ARM architecture family">Thumb</a></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Security and <br> <a href="Cryptographic_accelerator" title="Cryptographic accelerator">cryptography</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="VIA_PadLock" title="VIA PadLock">PadLock</a> (2003)</li>

<li><a href="AES_instruction_set" title="AES instruction set">AES-NI</a> (2008); ARMv8 also has AES instructions</li>

<li><a href="CLMUL_instruction_set" title="CLMUL instruction set">CLMUL</a> (2010)</li>

<li><a href="RDRAND" title="RDRAND">RDRAND</a> (2012)</li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Transactional_memory" title="Transactional memory">Transactional <br> memory</a></th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Hardware-assisted_virtualization" class="mw-redirect" title="Hardware-assisted virtualization">Virtualization</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

</div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>Suspended extensions' dates are <s>struck through</s>.</div></td></tr></tbody></table></div></div><div><div class="zim-footer">

This article is issued from <a class="external text" title="Last edited on 2025-05-16" href="https://en.wikipedia.org/wiki/?title=Software_Guard_Extensions&oldid=1290737268">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

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